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High Performance Bubble Memory Bad Minor Loop Deletion Method

IP.com Disclosure Number: IPCOM000046931D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Belser, KA: AUTHOR

Abstract

A bubble device design utilizes speed-up circuits which delete and bypass bad bits from a string of data to compress the data into all good bits. As shown in the drawing, the read channel consists of a plurality of C-bars 10 which contain bubbles that have been transferred from minor loops (not shown). When a bad bit is to be deleted at position 19, all the bubbles to the left of this position are advanced by two C-bar positions along path 1,2,3,4,5,6,7,8 via elements 14, 16, 17, 16 and 14 when current is applied to the conductor 12. The bad bit is propagated to element 16 which is associated with annihilator 18 which destroys the bad bits. Good bits continue on the C-bars 10 when no current is passed through the conductor 12.

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High Performance Bubble Memory Bad Minor Loop Deletion Method

A bubble device design utilizes speed-up circuits which delete and bypass bad bits from a string of data to compress the data into all good bits. As shown in the drawing, the read channel consists of a plurality of C-bars 10 which contain bubbles that have been transferred from minor loops (not shown). When a bad bit is to be deleted at position 19, all the bubbles to the left of this position are advanced by two C-bar positions along path 1,2,3,4,5,6,7,8 via elements 14, 16, 17, 16 and 14 when current is applied to the conductor 12. The bad bit is propagated to element 16 which is associated with annihilator 18 which destroys the bad bits. Good bits continue on the C-bars 10 when no current is passed through the conductor 12. With this speed-up scheme, it is possible to feed continuous, good data from and into the bubble chip.

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