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SEC-DED ECC Integrity Improvement (Power-On Hard Error Purge) With Notation and Word Substitution Invoke

IP.com Disclosure Number: IPCOM000046983D
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 4 page(s) / 61K

Publishing Venue

IBM

Related People

Ames, RN: AUTHOR [+4]

Abstract

Accumulation of single-bit hard errors in a data memory system incorporating SEC-DED (Single Error Correction - Double Error Detection)- type ECC (Error Correction Code) is prevented. Hard errors render SEC-DED useless in correcting a soft error which could occur during operation. SEC-DED corrects single-bit errors, hard or soft. A hardware failure is correctable by SEC-DED; however, another error (a soft error) is not correctable with a hard error already present. The purpose of this invention is to purge the system of hardware failures with Power-On Diagnostics so that SEC-DED is functional, as opposed to being rendered useless by a hard error's totally utilizing all of SEC-DED's correction capabilities.

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SEC-DED ECC Integrity Improvement (Power-On Hard Error Purge) With Notation and Word Substitution Invoke

Accumulation of single-bit hard errors in a data memory system incorporating SEC-DED (Single Error Correction - Double Error Detection)- type ECC (Error Correction Code) is prevented. Hard errors render SEC-DED useless in correcting a soft error which could occur during operation. SEC-DED corrects single-bit errors, hard or soft. A hardware failure is correctable by SEC-DED; however, another error (a soft error) is not correctable with a hard error already present. The purpose of this invention is to purge the system of hardware failures with Power-On Diagnostics so that SEC-DED is functional, as opposed to being rendered useless by a hard error's totally utilizing all of SEC-DED's correction capabilities. Here, otherwise undetected (1 bit/word) hard error or an accumulation of like errors in the storage community is detected in the most appropriate manner by scrubbing the entire storage at one time rather than depending on piecemeal discovery, as provided by error logging schemes. SEC-DED can correct only single-bit errors and can only detect (not correct) double-bit errors. If a condition exists such that single-bit error occurs during every read access, it will be corrected; however, if another bit also fails, the two-bit error cannot be corrected. A defective bit in a word of storage (a hard error) is corrected, but the SEC-DED error correction is totally used up in performing the hard error correction. A customer's system, having a hard error, will have an error correction system which is effectively inhibited. When a soft error occurs in the customer's system, it is non-correctable, and a system error occurs. Diagnose and Diagnose Modifier lines and associated control logic are provided so that Power-On Diagnostics can locate any hard failed memory modules. This will facilitate purging the system of defective memory modules, or the card if the modules are not pluggable, so that the SEC-DED ECC is fully functional during system operation. A first level functional block diagram is in Fig. 1, and the second level is in Fig. 2. Fig. 2 includes blocks 1-11. Both figures show 16 data bits and 6 check bits as data inputs and Diagnose and Diagnose Modifier as control inputs. Outputs of both figures are 16 data bits and 2 parity bits to the CPU. Normal error-correction reads are performed with both the Diagnose and the Diagnose Modifier off. The check Prime Bit Generator (C'BG) (block 4) generates the check prime bits to the Syndrome Generator (the first half of block 5) where they are compared with the check bits from memory to generate 6 syndrome bits. Correction bits are generated in the Syndrome Decoder (the second half of block 5) and are used to control the states of data through blocks 8 and 9. If a bit error occurs, the bit in error is toggled in either block 8 or 9. Note that a parity error would exist in this condition,...