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Browse Prior Art Database

Device Isolation Technique

IP.com Disclosure Number: IPCOM000047019D
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Kamal, M: AUTHOR [+2]

Abstract

This article discloses a new device isolation technique compatible with high device densities and gives an improved, more stable device and higher densities than can be achieved with present isolation techniques. The technique consists of taking a p-type substrate, and growing an oxide layer on the surface thereof. This oxide layer is formed to the same thickness to which the final epitaxial material is to be deposited. Once the oxide has been fully grown on the device, it is appropriately masked and pits are etched therein. These pits are formed to extend through the entire oxide layer until they reach and expose the surface of the underlying p-type substrate. In this way insulating walls of silicon dioxide are created surrounding each of the etched pits.

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Device Isolation Technique

This article discloses a new device isolation technique compatible with high device densities and gives an improved, more stable device and higher densities than can be achieved with present isolation techniques. The technique consists of taking a p-type substrate, and growing an oxide layer on the surface thereof. This oxide layer is formed to the same thickness to which the final epitaxial material is to be deposited. Once the oxide has been fully grown on the device, it is appropriately masked and pits are etched therein. These pits are formed to extend through the entire oxide layer until they reach and expose the surface of the underlying p-type substrate. In this way insulating walls of silicon dioxide are created surrounding each of the etched pits. When pits have been fully etched out, n-type silicon epitaxial material is grown or deposited in the pits in contact with the surface with the layer forming isolated islands of n-type material. This technique permits higher density devices in both bipolar and FET devices to be formed and keeps the devices so formed fully isolated from one another.

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