Browse Prior Art Database

Bipolar Integration of a Floating Current Source

IP.com Disclosure Number: IPCOM000047067D
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Ferry, M: AUTHOR

Abstract

This article relates to the embodiment of a floating current source from a single-ended sink and a single-ended source to get the equivalent of a MOS transistor. Unlike conventional bipolar current sinks or sources which have a high impedance terminal and a low impedance one, the two terminals of the source described below are high impedance terminals. This is done by synthesizing a complementary transistor by compounding several PNP and NPN transistors. Two NPN transistors T1 and T2 with current gains b1N and b2N are serially connected between nodes A and B with a current mirror circuit made of transistor T3 and T4 with transfer ratio bp equal to 1 and emitter-to-collector current gain ap.

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Bipolar Integration of a Floating Current Source

This article relates to the embodiment of a floating current source from a single-ended sink and a single-ended source to get the equivalent of a MOS transistor. Unlike conventional bipolar current sinks or sources which have a high impedance terminal and a low impedance one, the two terminals of the source described below are high impedance terminals. This is done by synthesizing a complementary transistor by compounding several PNP and NPN transistors. Two NPN transistors T1 and T2 with current gains b1N and b2N are serially connected between nodes A and B with a current mirror circuit made of transistor T3 and T4 with transfer ratio bp equal to 1 and emitter-to-collector current gain ap. In this arrangement, it can be demonstrated that ICN = ICP, as follows: IB2 = IE/(b2N + 1) IB1 = ICP/(b1N +1) I2 = ICP {b1N/(b1N + 1)} I1 =

IB1/ap thus by assuming that: and developing the ratio ICN/ICP to the first order one obtains: where e is the tracking error e1 + e2 of the ratios b's of two NPN transistors, one respective to the other.

With the present manufacturing techniques, it is possible to make e/bN equal to 5% so that ICN Z ICP. The circuit can be voltage controlled as shown in Fig. 2. In this case, current Ic is equal to (V2-V1-2VBE)(aN/R), where aN is the common base gain of a NPN transistor. In the circuit of Fig. 3, the control is made by using current mirrors. In Fig. 3A, a tracking of VBE voltage of PNP transi...