Browse Prior Art Database

Flexible Data Collection Function for Burn-In Tools

IP.com Disclosure Number: IPCOM000047177D
Original Publication Date: 1983-Oct-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Anemojanis, E: AUTHOR

Abstract

This circuit permits data collection from any memory product regardless of product organization. The circuit also provides a realtime count and fail address limit comparison for high temperature fail criteria as well as high throughput, and can be adapted to any existing software-driven test system. The data output of a device under test (DUT) 10 is fed into sense current or voltage level detectors (not shown), the output of which is loaded into the product data output register 11 in parallel or serially depending on the architecture of the device under test. The output of register 11 is compared in a comparator 12 against the expected data which is fed to the expected data register 13 from a pattern generator 14. The compared information is loaded into a data-out register 15.

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Flexible Data Collection Function for Burn-In Tools

This circuit permits data collection from any memory product regardless of product organization. The circuit also provides a realtime count and fail address limit comparison for high temperature fail criteria as well as high throughput, and can be adapted to any existing software-driven test system. The data output of a device under test (DUT) 10 is fed into sense current or voltage level detectors (not shown), the output of which is loaded into the product data output register 11 in parallel or serially depending on the architecture of the device under test. The output of register 11 is compared in a comparator 12 against the expected data which is fed to the expected data register 13 from a pattern generator 14. The compared information is loaded into a data-out register 15. The output of the data-out register 15 can be linked to a cell map data buffer (not shown) or directly to a CPU (not shown). This same data is ORed, and if any data output fails, the F/P FL (product fail flip latch) 16 will be set. The output of the F/P FL 16 is gated to the counter at change of product address this way in multiple read or unique address mode the counter will contain the correct fail count. If any of the devices under test do not fail, no count will be registered. The fail address limit register 17 will allow generation of a variable burn-in time based on the rate of fail change during the burn-in cycle. The fail address c...