Browse Prior Art Database

Multiformat Serializer

IP.com Disclosure Number: IPCOM000047211D
Original Publication Date: 1983-Oct-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Pilost, D: AUTHOR

Abstract

In a DSB-QC type of modem receiver made to operate at various bit rates within 12000 bps (bits per second) and 4800 bps at a 2400 baud rate, the receiver input signal is sampled using a CK1 clock at a baud rate multiple (say, 12000 cps (cycles per second)). The samples are then processed by a signal processor which derives therefrom the received symbol and a corresponding group of data bits decoded each baud time. These bits have then to be forwarded (serialized) toward the corresponding terminal (DTE) at the adequate bit rate, e.g. 9600 bps, without any error. The present multiformat serializer performs the bit distribution of the data bits with a minimal extra hardware for processing any of the bit rates even though the circuit description will be given for a 9600 bps rate.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Multiformat Serializer

In a DSB-QC type of modem receiver made to operate at various bit rates within 12000 bps (bits per second) and 4800 bps at a 2400 baud rate, the receiver input signal is sampled using a CK1 clock at a baud rate multiple (say, 12000 cps (cycles per second)). The samples are then processed by a signal processor which derives therefrom the received symbol and a corresponding group of data bits decoded each baud time. These bits have then to be forwarded (serialized) toward the corresponding terminal (DTE) at the adequate bit rate, e.g. 9600 bps, without any error. The present multiformat serializer performs the bit distribution of the data bits with a minimal extra hardware for processing any of the bit rates even though the circuit description will be given for a 9600 bps rate. First, it may be helpful to recall a few of the characteristics of the microprogrammed modem receiver. The input signal is sampled in an analog-to-digital (A/D) converter at a rate of 12000 cps using a first clock, i.e., a phase-locked oscillator (PLO) controlled by the microprocessor, for performing the subsequent signal processing operations. The currently received data bit rate (second clock CK2 at, say, 9600 cps) has a fixed phase relationship with respect to the first clock once per baud time, i.e., 1/2400 second. The multiformat serializer can thus be made according to Fig. 1. The data bits provided by decoding a symbol are first loaded into a buffer register REG...