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Tapered Photoresist for a Doping Profile

IP.com Disclosure Number: IPCOM000047323D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Badami, DA: AUTHOR [+4]

Abstract

A method is provided to achieve in a semiconductor structure a graded dopant profile by using a tapered photoresist pattern which is obtained by exposing the resist with broad-band mid UV (254-313 nm). This method takes advantage of the tapered resist profile during ion-implantation, thus creating a graded impurity profile that reduces the electric field at the junction edge, particularly in shallow junctions. For example, in the figure shown above, a desired dopant profile at the drain is established with a low concentration edge separated from a high concentration edge by 0.5 to 0.6 mm. This is accomplished by forming an SiO2 layer of about 300 ˜ on a silicon wafer for use as a screen oxide during the implantation of a highly doped drain region. An equivalent SiO2 layer of about 570 ˜ remains over the lightly doped region.

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Tapered Photoresist for a Doping Profile

A method is provided to achieve in a semiconductor structure a graded dopant profile by using a tapered photoresist pattern which is obtained by exposing the resist with broad-band mid UV (254-313 nm). This method takes advantage of the tapered resist profile during ion-implantation, thus creating a graded impurity profile that reduces the electric field at the junction edge, particularly in shallow junctions. For example, in the figure shown above, a desired dopant profile at the drain is established with a low concentration edge separated from a high concentration edge by 0.5 to 0.6 mm. This is accomplished by forming an SiO2 layer of about 300 ~ on a silicon wafer for use as a screen oxide during the implantation of a highly doped drain region. An equivalent SiO2 layer of about 570 ~ remains over the lightly doped region. A photoresist layer of thickness equal to or larger than 1.2 mm is defined over the 570 ~ and tapered to have an angle of about 45OE with respect to the plane of the wafer.

High dose arsenic is implanted through the 300 ~ screen oxide at 60 keV, using the resist and the 570 ~ oxide as the mask. This is followed by a low dose phosphorous implant at 200 keV through the tapered resist edge and the insulators. For given ion implant conditions, the photoresist type, thickness and slope, and the insulator layers and thicknesses are defined so that the lightly doped drain edge is about 0.5 mm away from the hi...