Browse Prior Art Database

Chip-Mounting Structure Having an Intermediate Member

IP.com Disclosure Number: IPCOM000047348D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Arnold, AF: AUTHOR

Abstract

A structure for mounting an integrated circuit chip to a substrate which includes an intermediate member between the chip and the substrate is disclosed. Typically, a chip is mounted to a substrate by soldering an array of metal pads on the chip surface to a corresponding array of metal pads on the substrate. This approach has the advantages of simplicity and economy of manufacture. However, heat transfer from the chip to the substrate occurs only through the small diameter solder interconnections between the arrays of metal pads. In some applications it may be necessary to provide an additional heat sink to the opposed surface of the chip to provide sufficient heat dissipation.

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Chip-Mounting Structure Having an Intermediate Member

A structure for mounting an integrated circuit chip to a substrate which includes an intermediate member between the chip and the substrate is disclosed. Typically, a chip is mounted to a substrate by soldering an array of metal pads on the chip surface to a corresponding array of metal pads on the substrate. This approach has the advantages of simplicity and economy of manufacture. However, heat transfer from the chip to the substrate occurs only through the small diameter solder interconnections between the arrays of metal pads. In some applications it may be necessary to provide an additional heat sink to the opposed surface of the chip to provide sufficient heat dissipation. As shown in the figure, a solution to this problem is to solder a chip 1 with an array of metal pads 2 thereon to a first array of contact pads 3 on the surface of an intermediate member 4 using solder 5. A second corresponding array of contact pads 6 on the intermediate member 4 is soldered to an array of contacts 7 on a substrate 8 using solder 9. The one-to-one electrical connections between the contact pads of the first and second arrays on the intermediate member 4 are formed using thin film metallization techniques compatible with the material of which the member is composed. This pattern may be a single layer or it may consist of multiple levels which can provide inter pad wiring for the chip or between chips if more than one ch...