Browse Prior Art Database

SDLC Interface for Modems

IP.com Disclosure Number: IPCOM000047368D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Cholat-Namy, J: AUTHOR [+3]

Abstract

In a data communication network, modulators/demodulators (modems) are provided to enable transmission of the data over lines. Modern modems mainly comprise program-controlled processors associated with analog-to-digital and digital-to-analog converters. The modems are normally transparent to data. However, mainly for maintenance purposes, a violation of such a transparency should be made possible. For instance, it might be desirable to test a remote modem without interrupting the traffic over the whole network. A solution to this problem is provided by making the concerned remote modem lose its transparency for a specific data frame to be made aware of the subsequently received data frame which conveys the test message.

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SDLC Interface for Modems

In a data communication network, modulators/demodulators (modems) are provided to enable transmission of the data over lines. Modern modems mainly comprise program-controlled processors associated with analog-to-digital and digital-to-analog converters. The modems are normally transparent to data. However, mainly for maintenance purposes, a violation of such a transparency should be made possible. For instance, it might be desirable to test a remote modem without interrupting the traffic over the whole network. A solution to this problem is provided by making the concerned remote modem lose its transparency for a specific data frame to be made aware of the subsequently received data frame which conveys the test message. When communicating in SDLC (synchronous data link control), the above method may imply that, in addition to its normal task, the modem processor should have to permanently process the input data bit stream to detect a flag (hexadecimal value "7E" in SDLC) and then process the subsequent message. Such an additional processing may overload the processor. To avoid such an overloading, a piece of hardware has been added to the processor. Such hardware analyzes the incoming bit train to detect the SDLC flag. As soon as the "7E" flag is detected, the hardware processes the subsequent bit stream. Such a processing involves zero deletion (de-stuffing) operations and byte assembling. As soon as a byte has been assembled, the hardw...