Browse Prior Art Database

Real-Time Functional Testing of VLSI Single-Chip Processors

IP.com Disclosure Number: IPCOM000047371D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Blum, A: AUTHOR

Abstract

To introduce real-time functional testing of VLSI chip processors at an early stage, interim hardware is provided as a substitute for the maintenance processor, the bus clocks, the bus arbiter, and the memory. Also needed are cards and boards for this hardware. Providing this interim hardware requires manpower which, once the final hardware is available, is no longer needed. The purpose of all this is to provide, in addition to simulation, real-time functional testing which is difficult to accomplish because of the slow clocking of the interim hardware in conventional technology. Therefore, it is proposed that the VLSI processor be functionally tested during manufacture.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 51% of the total text.

Page 1 of 1

Real-Time Functional Testing of VLSI Single-Chip Processors

To introduce real-time functional testing of VLSI chip processors at an early stage, interim hardware is provided as a substitute for the maintenance processor, the bus clocks, the bus arbiter, and the memory. Also needed are cards and boards for this hardware. Providing this interim hardware requires manpower which, once the final hardware is available, is no longer needed. The purpose of all this is to provide, in addition to simulation, real-time functional testing which is difficult to accomplish because of the slow clocking of the interim hardware in conventional technology. Therefore, it is proposed that the VLSI processor be functionally tested during manufacture. Suitable test equipment is available, as there are concentrated electrical test facilities for single VLSI chips, by means of which probes are attached to all chip pads. For this purpose, the code used for microtesting the processor is applied to the physical processor in the same sequence, time-controlling only the oscillator input pads of the processor chip as often as is required for each micro instruction. The information required for this purpose is extracted from the data of the simulation run. The important point is that this method does not require verifying the chip pads after each control step, as the test patterns, which are self-testing by their very nature, constitute the object code for the micro test. Thus, for internal micro instructions of the processor, the test equipment has to obser...