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Power Supply Isolator for RAM Back-Up Battery

IP.com Disclosure Number: IPCOM000047408D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Pettit, JW: AUTHOR [+2]

Abstract

In a random-access memory (RAM) system shown in Fig. 1 and Fig. 3, the battery must supply auxiliary power to the RAM when the 5 V supply falls below a critical level. This protects the contents of the RAM during loss of main power. However, the battery must not be loaded by other 5 V circuitry, which would shorten battery life. Automatic switching is provided to battery power when the 5 V supply drops, which disconnects other loads. Low series loss is provided when the 5 V supply is up and reverse current flow into the battery is prevented. This is accomplished using a power metal oxide semiconductor field-effect transistor (MOSFET) with small "on" resistance. In Fig. 1, T1 is a series P channel MOSFET switch. The intrinsic drain-to-source diode is used to facilitate switching as the 5 V supply, VS, comes up.

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Power Supply Isolator for RAM Back-Up Battery

In a random-access memory (RAM) system shown in Fig. 1 and Fig. 3, the battery must supply auxiliary power to the RAM when the 5 V supply falls below a critical level. This protects the contents of the RAM during loss of main power. However, the battery must not be loaded by other 5 V circuitry, which would shorten battery life. Automatic switching is provided to battery power when the 5 V supply drops, which disconnects other loads. Low series loss is provided when the 5 V supply is up and reverse current flow into the battery is prevented. This is accomplished using a power metal oxide semiconductor field-effect transistor (MOSFET) with small "on" resistance. In Fig. 1, T1 is a series P channel MOSFET switch. The intrinsic drain-to-source diode is used to facilitate switching as the 5 V supply, VS, comes up. While the 5 V supply is down, the battery supplies RAM power through the emitter-base junction of T2, which is saturated, forcing the gate of T1 up to approximately VB, as well as the terminal of pull-down resistor R1 connected to the gate of T1. At this time, T1 is not conducting because the gate is one diode drop above the source. The RAM voltage is equal to: VRAM = (VB-VBE2) where VRAM = Voltage across RAM

VB = Battery Voltage

VBE2 = Base to Emitter Voltage of T2 VB is chosen such that this voltage is sufficient to maintain memory. No battery current flows to loads on the 5 V supply line. As the 5 V supply voltage VS rises to a diode drop above VRAM, the intrinsic diode in T1 starts to conduct and VRAM begins to rise. VBE2 is reduced and T2 turns off; its collector fall...