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Tone Generation and Assignable Digital Time Multiplexed Switch Circuit

IP.com Disclosure Number: IPCOM000047423D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Jordan, A: AUTHOR

Abstract

This article describes a device which enables pulse code modulated (PCM) data, such as encoded tones or the like, to be controlled (that is, to be read in and out of a storage) on a fixed cycle and to be randomly gated onto a digital time multiplexed switch. In Fig. 1, PCM encoded tones (not shown) are read from different devices and are stored in addressable memory locations identified by numerals 1, 2, 3 ... N. A recirculating shift register 10 accepts data from multiplexer (MPX) bus 12. Data on the multiplexer bus is obtained from one of the memory addresses selected by address counter (ADR CTR) 14 and control logic means 16. The data in shift register 10 is circulated and gated out of AND circuit 18 by a controlled pulse on conductor 20. The pulse on conductor 20 is generated by the time slot assignment circuit (TSAC).

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Tone Generation and Assignable Digital Time Multiplexed Switch Circuit

This article describes a device which enables pulse code modulated (PCM) data, such as encoded tones or the like, to be controlled (that is, to be read in and out of a storage) on a fixed cycle and to be randomly gated onto a digital time multiplexed switch. In Fig. 1, PCM encoded tones (not shown) are read from different devices and are stored in addressable memory locations identified by numerals 1, 2, 3 ... N. A recirculating shift register 10 accepts data from multiplexer (MPX) bus 12. Data on the multiplexer bus is obtained from one of the memory addresses selected by address counter (ADR CTR) 14 and control logic means 16. The data in shift register 10 is circulated and gated out of AND circuit 18 by a controlled pulse on conductor 20. The pulse on conductor 20 is generated by the time slot assignment circuit (TSAC). The pulse is representative of the time slot which is assigned to a particular device to transmit data through a digital time multiplexer switch (not shown). Fig. 2 shows a block diagram for TSAC. Essentially, TSAC is comprised of a comparator with a counter and a register connected to its input terminals. The register stores a time slot which is assigned to a particular device, and the counter generates clock pulses. When the contents of the register and the counter are identical, a pulse is outputted on conductor 20. The pulse is used to gate the contents of the shift regi...