Browse Prior Art Database

Catalog Address Space Support

IP.com Disclosure Number: IPCOM000047466D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Eastridge, LE: AUTHOR

Abstract

This article describes a method for utilizing the cross memory feature of the IBM Multiple Virtual Systems (MVS) operating system to locate catalog management in its own private address space and utilize a subtask structure in the catalog address spec (CAS) to process concurrent requests for catalog services. Catalog management under the IBM MVS operating system is provided by the Virtual Sequential Access Method (VSAM) and Data Facility Extended Function (DFEF) and is accessed by Supervisor Call (SVC(26)). The existing code, control blocks, buffers and data structures reside in MVS common storage area (CSA), and not in its own private address space.

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Catalog Address Space Support

This article describes a method for utilizing the cross memory feature of the IBM Multiple Virtual Systems (MVS) operating system to locate catalog management in its own private address space and utilize a subtask structure in the catalog address spec (CAS) to process concurrent requests for catalog services. Catalog management under the IBM MVS operating system is provided by the Virtual Sequential Access Method (VSAM) and Data Facility Extended Function (DFEF) and is accessed by Supervisor Call (SVC(26)). The existing code, control blocks, buffers and data structures reside in MVS common storage area (CSA), and not in its own private address space. As will be explained further, CAS has its own address space, most of its code resides in, and its major control blocks, buffers, and data structures are created in, the private area of CAS. Further, CAS uses cross memory services of MVS for inter-address space communication, it executes under both the SVC(26) requestor's Task Control Block (TCB) and one or more catalog address space TCBs. This multiple TCB structure facilitates a high degree of parallelism. The major logic flow and control blocks implementing CAS are set forth in the figures. In these figures, the block titles refer to module names, with the small blocks referring to modules in the existing code, and the large blocks to those herein proposed for implementing CAS. The numbers in parentheses indicate the sequence of execution, or flow of control. Referring to Fig. 1, the CAS initialization module flow is depicted. Executing within the master scheduler address space 10, following initial program load (IPL) of the operating system, nucleus initialization program (NIPM) 12 and catalog resource initialization module (NP1B) 14 initialize the nucleus and catalog, respectively, as is currently done. When control passes to new module IEAVNP1C 16, it executes to trigger creation of the address space for the new catalog, in the process passing control to memory create module IEEMB881 18 for creation of the catalog address space 20 including region control task initialization TCB IEAVAR00 21, dump task TCB IEAVTSDT 22, and started task control TCB IEEPRWI2 24. Catalog address space initialization module IGG0ASIM 28 executes to initialize catalog address space 20, attaches catalog request processor IGGOCLAB 26, issues a cross memory (XMEM) post to module IEAVNP1C 16 in master scheduler address space 10, which has been waiting for ASIM 28, and goes into a wait state for restart. Upon receiving the cross memory post from ASIM 28, CAS initialization is completed, and control passes to catalog resource initialization module 14 instance 14a. Fig. 2 sets forth the processing of a supervisor call (SVC(26)), representing a request for catalog services. SVC(26) first lo...