Browse Prior Art Database

Diagnostic Test for Decrement Byte Counters

IP.com Disclosure Number: IPCOM000047519D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Farrell, RH: AUTHOR [+3]

Abstract

Controller microcode is utilized to test a decrement byte counter. Such a counter is typically used on input/output (I/O) attachment cards in conjunction with a minimum number of module I/O pins. Referring to Figs. 1A and 1B, in operation counter 1 is loaded with a value by the microcode using the signal + Microcode Load with the bits + Load Bit Qo to Qn. The device logic decrements the counter to satisfy a particular function (e.g., determine when a block of data has been transmitted) and the device monitors for the condition that the counter has decremented to 0 to terminate the particular function by signal line -Count (CNT) = 0.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 87% of the total text.

Page 1 of 2

Diagnostic Test for Decrement Byte Counters

Controller microcode is utilized to test a decrement byte counter. Such a counter is typically used on input/output (I/O) attachment cards in conjunction with a minimum number of module I/O pins. Referring to Figs. 1A and 1B, in operation counter 1 is loaded with a value by the microcode using the signal + Microcode Load with the bits + Load Bit Qo to Qn. The device logic decrements the counter to satisfy a particular function (e.g., determine when a block of data has been transmitted) and the device monitors for the condition that the counter has decremented to 0 to terminate the particular function by signal line -Count (CNT) = 0. When the particular attachment card powers up and does its microcode diagnostics, it can test the counter by loading all Q bits with 0's and sensing for that condition through Microcode Sense Counter (CNTR) and Microcode Sense 0. The next test is to load all Q bits with 1's and sense for that condition through Microcode Sense Counter and Microcode Sense F. The next test is to load the counter with 0's, step the counter once using Microcode Step. The counter ripples to the F (all 1's) state and is sensed. The final test is to load the counter with 1's, step the counter until it decrements to 0 with Microcode Step and then sense its state. In this fashion the states of the counter can be sensed with only one I/O pin instead of sensing each individual bit of the counter by the microcode. This m...