Browse Prior Art Database

Active On-Chip Driver

IP.com Disclosure Number: IPCOM000047841D
Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Culican, EF: AUTHOR [+2]

Abstract

T2L circuits tend to exhibit skew and pulse shrinkage at high line capacitance. This problem is intensified when lines become longer as chip size increases. The disclosed circuit may be used as an internal cell to provide active pull-up for high capacitive nets. When the input is high, transistors T2 and T4 are both on, and the output is low. The resistor divider (Node B) biases the base of T3 slightly below turn-on voltage. As the input is lowered, T2 and T4 are shut off and node B starts to rise. Transistor 3 then turns on and provides a low impedance path to charge up the output (active pull-up). As the input is raised again, T2 and T4 are turned on. Transistor T4 provides the pull-down capability.

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Active On-Chip Driver

T2L circuits tend to exhibit skew and pulse shrinkage at high line capacitance. This problem is intensified when lines become longer as chip size increases. The disclosed circuit may be used as an internal cell to provide active pull-up for high capacitive nets. When the input is high, transistors T2 and T4 are both on, and the output is low. The resistor divider (Node B) biases the base of T3 slightly below turn-on voltage. As the input is lowered, T2 and T4 are shut off and node B starts to rise. Transistor 3 then turns on and provides a low impedance path to charge up the output (active pull-up). As the input is raised again, T2 and T4 are turned on. Transistor T4 provides the pull-down capability. The disclosed circuit improves performance because it provides each edge with a low impedance path to reach its desired state.

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