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Enhanced Reduced Signal Swing Driver

IP.com Disclosure Number: IPCOM000047856D
Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Gaudenzi, GJ: AUTHOR [+2]

Abstract

Shown in Fig. 1 is a Darlington push-pull off-chip driver circuit powered by a 3.4-volt power supply. The minimum output signal swing is 1.0 volt with a least positive up level (LPUL) of 1.5 volts and a most positive down level (MPDL) of 0.5 volt. The following features are designed into the driver output stage: 1) Output up-level voltage requirements (LPUL) are optimized without the need for large emitter area (>1 mi12) output transistors; 2) Excessive down level ringing which could result in false switching of driver loads is minimized. The following is a brief discussion of the circuit operation. Conventional Darlington output circuits (Fig.

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Enhanced Reduced Signal Swing Driver

Shown in Fig. 1 is a Darlington push-pull off-chip driver circuit powered by a 3.4-volt power supply. The minimum output signal swing is 1.0 volt with a least positive up level (LPUL) of 1.5 volts and a most positive down level (MPDL) of 0.5 volt. The following features are designed into the driver output stage: 1) Output up-level voltage requirements (LPUL) are optimized without the need for large emitter area (>1 mi12)

output transistors; 2) Excessive down level ringing which could result in false switching of driver loads is minimized. The following is a brief discussion of the circuit operation. Conventional Darlington output circuits (Fig. 2) require Schottky diode S1 and resistor R (or an equivalent resistance R) for the AC discharge of the base node of transistor T7 when switching the output to a down level. In this configuration the emitter current of T6 is equal to IET6 = IBT7 + IS1R. Due to the current IS1R (<1 ma) the VBE of T6 is increased which results in a reduction in the output voltage up level (N60-75 mv). In the Fig. 1 circuit, transistor T5 has been added, as shown, with the emitter connected to the common node of resistor R and Schottky diode S1. When the driver input A is at a logical 0, transistors T1 and T2 are off and the voltage at the base of T4, T5 and T6 is high, causing T7 to conduct which establishes a logical 1 level at output A. Note that transistor T5 must conduct due to resistor R connected to ground. Since VBET5 NVBET6, Schottky diode S1 will not conduct. Hence, the emitter...