Browse Prior Art Database

Device Control of Interface Signaling Formats Governed by Computer Commands

IP.com Disclosure Number: IPCOM000047999D
Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 3 page(s) / 36K

Publishing Venue

IBM

Related People

Heath, CA: AUTHOR

Abstract

The illustrated system permits a host computer system 1 to communicate with a device 2 in a variety of data transfer formats. The adapter 3, in response to commands from system 1, conducts varied length data transfers between host memory 1A and the device in various bit parallel formats. The adapter operates autonomously through direct access to the host memory to conduct such transfers in a "cycle stealing" mode. An example of a host processor and adapter system capable of such operations would be the IBM Series/1 processor and its "programmable cycle stealing digital input/digital output attachment" (RPQ DO 2288). A microprocessor integrated within the attachment card (adapter) prepares discrete hardware circuits on the card for each cycle stealing transfer process.

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Device Control of Interface Signaling Formats Governed by Computer Commands

The illustrated system permits a host computer system 1 to communicate with a device 2 in a variety of data transfer formats.

The adapter 3, in response to commands from system 1, conducts varied length data transfers between host memory 1A and the device in various bit parallel formats. The adapter operates autonomously through direct access to the host memory to conduct such transfers in a "cycle stealing" mode. An example of a host processor and adapter system capable of such operations would be the IBM Series/1 processor and its "programmable cycle stealing digital input/digital output attachment" (RPQ DO 2288). A microprocessor integrated within the attachment card (adapter) prepares discrete hardware circuits on the card for each cycle stealing transfer process. The latter circuits thereafter operate to transfer data independent of both the microprocessor and the host system CPU. Under certain circumstances it could be desirable to permit the device to evoke the interface configuration (format) to which the adapter card conforms. However, permitting the device to do so without awareness on the part of host system software could lead to system malfunction. Accordingly, the scheme described below may be used to permit direct control of adapter interface configurations, by participating devices, under "supervision" of host software. In accordance with this objective, a special input/output command, presently architected for the host system, serves to condition the adapter (through its integral microprocessor) to a state of receptiveness to certain specified device control signals. In response to such control signals, either directly from the device or indirectly from the microprocessor after it has been stimulated by the device, t...