Browse Prior Art Database

Technique For Improved Channel Performance

IP.com Disclosure Number: IPCOM000048039D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Court, JF: AUTHOR [+2]

Abstract

When a processor uses a cache with a "Store-in Buffer" algorithm, performance impacts are felt by associated I/O channels due to delays in fetching channel common words (CCWs) which are currently stored in the processor's cache. On such fetches a line in the cache, which contains the CCW, must be "cast out" to main storage and thereafter transferred from main storage to the channel. Because of timing dependencies such delays may cause overruns due to missed revolutions on direct-access storage devices (DASDs).

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Technique For Improved Channel Performance

When a processor uses a cache with a "Store-in Buffer" algorithm, performance impacts are felt by associated I/O channels due to delays in fetching channel common words (CCWs) which are currently stored in the processor's cache. On such fetches a line in the cache, which contains the CCW, must be "cast out" to main storage and thereafter transferred from main storage to the channel. Because of timing dependencies such delays may cause overruns due to missed revolutions on direct-access storage devices (DASDs).

In order to avoid such delays, cast-outs can be forced by programs executed on the central processing level for initiating I/O operations, thereby insuring that the CCWs are in main store when required "instantaneously" by the channels
(i.e., when the channels are in actual communication with the devices). A mechanism to accomplish this is a specialized program instruction which may be called "Start I/O with Castout". This instruction may be configured to refer central processing hardware to information, e.g., in a general-purpose register (GPR), which defines the location of a list containing one or more pairs of starting and ending address parameters. By reference to this list central processing hardware may be operated to perform one or more casting-out operations between starting and ending addresses in the cache and associated addresses in main storage.

This instruction should be used in the I/O Supervisor portion of the central operating system program. Since the I/O Supervisor makes "shadow" copies of user...