Browse Prior Art Database

Head Loader Control Circuit

IP.com Disclosure Number: IPCOM000048051D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Hanley, MF: AUTHOR

Abstract

The circuit provides a means to positively control a motor/cam type head loader and also provides two status (interlock) lines to indicate that the head is either loaded or unloaded.

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Head Loader Control Circuit

The circuit provides a means to positively control a motor/cam type head loader and also provides two status (interlock) lines to indicate that the head is either loaded or unloaded.

This circuit requires a minimum of parts and needs only the supply voltages, a common and a control line to operate. Two outputs are available as status or interlock lines.

In operation, beginning with the head unloaded state, assume that the control line 5 is low. The head loaded line 6 is high because phototransistor Q3 is blocked from its light source 17, turning it off (Figs. 1 and 2). The head unloaded line 7 is low because phototransistor Q4 is receiving light through a window in the flag 15. Conditions are now such that neither AND gate 8 nor AND gate 9 has turned off its respective transistor, so relay 10 is deenergized and the motor 12 is stopped.

When head load is called for, the control line 5 is brought high. Inverter 14 disables the unload AND gate 9. With the control line 5 and head loaded line 6 high, the load AND gate 8 turns on Ql and current drawn through the coil of relay 10 causes it to pick, applying current to the motor. The motor, through action of cam 19, moves the flag 15 until a window 21 uncovers Q3 which conducts and pulls the head loaded line 6 low. The load gate 8 shuts Ql off, relay 10 is de- energized, and motor 12 stops.

Meanwhile, the window 22 over Q4 was moved away, thereby shutting it off. The head unloaded line 7 is no...