Browse Prior Art Database

Switching Devices Implemented in Cross-Hatched Devices or Perforated Sheets

IP.com Disclosure Number: IPCOM000048090D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 3 page(s) / 90K

Publishing Venue

IBM

Related People

Chang, H: AUTHOR

Abstract

Edit, swap, edit/swap, and ladder switches are described which enable data management operations in perforated sheet bubble devices so as to alleviate I/O congestion and upgrade system speed.

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Switching Devices Implemented in Cross-Hatched Devices or Perforated Sheets

Edit, swap, edit/swap, and ladder switches are described which enable data management operations in perforated sheet bubble devices so as to alleviate I/O congestion and upgrade system speed.

Conceptually, bubble devices have been explored to fulfill data management functions, which have given rise to the proposals of dynamic ordering, text editing, bubble ladder, data base, etc. However, the main pursuit of bubble research and development is still high density, low-cost devices, which have resulted in the megabit chip for commercial products and the promise of even denser and higher capacity chips. It is believed that further increase in chip capacity will require the implementation of data management functions on chip, in order to avoid the I/O congestion problem and to achieve performance improvement.

The heart of the data management chips is the various switches to effect data permutation. Editing devices allow permutation of individual bits. Swap/edit devices enhance the simple edit devices with on-site clear and write facilities. Bubble ladders allow permutation of records. Here, coiless high speed bubble devices are used for various switches.

Fig. 1 shows several switches based on cross-hatched bubble devices proposed by Voegeli (*). A bit map is given as the background. It is particularly convenient to construct switches in cross-hatched devices because each bit can be made to propagate to one of four positions surrounding it. The choice is guided by channels (i.e., thickness adjustment in the storage medium) or current sequence.

In text editing, or dynamic re-ordering, the shift register is modified to provide an idler path 10 and a bypass path 12. During normal operation, the current sequence 4321 4321 DATA PROPAGATE IN THE CLOCKWISE DIRECTION along a main path 14. To freeze a bit in the rightmost position, the current sequence is changed to 1234 1234. Then the data, with the exception of the rightmost bit, will travel counterclockwise going through the bypass path 12, while the rightmost bit will circulate in the idler path 10. The half openings in the channels are barriers. A bit prefers to travel through a full opening rather than a half opening, but certain current sequences do not permit any choice but the half opening path.

For swapping (or simultaneous clear and write) the minor loop 16 is linked to the major loop 18 with double paths, such that an old bit is ejected from the major loop and a new bit is injected into its position. During normal operation the current sequence is 4321 4321. The data is the minor loop 16 circulates in the clockwise direction, and the data in the major loop 18 travels upwards. For swapping, one cycle of 1234 is introduced (----4321 4321 1234 4321----). During
that cycle, a new bit is injected from the major loop 18 via the inj...