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Macrolevel Testing of Microlevel Architecture

IP.com Disclosure Number: IPCOM000048137D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Gorga, DJ: AUTHOR

Abstract

Microlevel computer hardware can be tested with greater ease and efficiency by using the microcode to provide direct access to various microlevel buses for use by macrocode instructions.

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This is the abbreviated version, containing approximately 100% of the total text.

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Macrolevel Testing of Microlevel Architecture

Microlevel computer hardware can be tested with greater ease and efficiency by using the microcode to provide direct access to various microlevel buses for use by macrocode instructions.

For example, a macrocode diagnostic instruction can enable a small group of microcode to provide access to microlevel buses. Macrocode instructions can then read or write the various microlevel facilities, such as input/output registers, interrupt registers and other processors. With this method, diagnostic tests usually written in microcode can now be written in macrocode.

More thorough testing results since the microlevel facilities can be checked with less reliance on the portion of the facilities visible at the macro architecture level. This technique also requires less microcode control storage while providing greater test flexibility because the instructions can be modified or expanded more easily at the macrolevel than at the microlevel.

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