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Browse Prior Art Database

All Ion Implant Bipolar Transistor Process

IP.com Disclosure Number: IPCOM000048157D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Barbee, SG: AUTHOR [+2]

Abstract

Using standard silicon process technology, this is a proposal for a simplified all ion implant bipolar transistor process. Besides significantly improving density it allows for high beta values due to uncompensated emitters as well as for good control over Schottky characteristics. In brief, a blanket subcollector is implanted, epi grown, the base implanted through a screen oxide with only a blockout mask to protect the Schottky, oxide grown, nitride deposited, all contacts/DDI mask, DDI (deep dielectric isolation) process done, and then a unique contact process performed using reactive ion etching (RIE) and ion implantation (II). Detailed Process Step Sequence 1. Blanket arsenic implant (or capsule diffusion) for subcollector. Standard process is used (but without masking) including diffusion and oxidation.

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All Ion Implant Bipolar Transistor Process

Using standard silicon process technology, this is a proposal for a simplified all ion implant bipolar transistor process. Besides significantly improving density it allows for high beta values due to uncompensated emitters as well as for good control over Schottky characteristics. In brief, a blanket subcollector is implanted, epi grown, the base implanted through a screen oxide with only a blockout mask to protect the Schottky, oxide grown, nitride deposited, all contacts/DDI mask, DDI (deep dielectric isolation) process done, and then a unique contact process performed using reactive ion etching (RIE) and ion implantation (II). Detailed Process Step Sequence

1. Blanket arsenic implant (or capsule diffusion) for subcollector. Standard process is used (but without masking) including diffusion and oxidation. 2. Grow epi standard process.

3. Grow epi oxide - 250 A screen.

4. Blockout mask for Schottky barrier diode (SBD).

5. II boron R(P)=5000 A for intrinsic base.

6. Oxidation 1000A. Use wet oxidation at high pressure to minimize impurity redistribution. 7. CVD (chemical vapor deposition) nitride 1600 A standard process.

8. All contact and DDI mask - open nitride and oxide for all contacts and the DDI trench. The SBD, however, is not opened. Using one mask allows perfect alignment. 9. Blockout P/R (photoresist) in all contacts except the DDI trench. Perform standard DDI process to open the trench around the transistor. Fill in with CVD oxide or intrinsic polysilicon. Alternatively, one maks can be used to open the DDI trench, and the second to open all contacts. This would be a critical mask. It is probably avoidable, however, by using P/R to protect contacts during the DDI RIE. 10. Grow screen oxide in all contacts. Ion implant arsenic for emitter in all of the contacts (emitter E, base B, collector
C). The nitride/oxide protects the SBD. See structure illustrated in Fig. 1.

11. Block out SBD and emitter. RIE base and contact holes. The silicon etch rate is at lease an order of magnitude higher than the nitride etch rate for available gases so a blockout mask is adequate. The RIE step removes silicon from base and contact, including the implanted arsenic. The depth of this hole is not critical so long as it terminates somewhere in the base. A silicon RIE with a depth accuracy and reproducibility of plus 500 A is adequate.

12. II of P+ boron at low energy fo...