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PLA With Intermixed AND and OR Arrays

IP.com Disclosure Number: IPCOM000048376D
Original Publication Date: 1982-Jan-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Askin, HO: AUTHOR [+2]

Abstract

A programmable logic array (PLA) is formed with identical elements that interconnect crossover points of the row and column lines of both the AND array and the OR array. Where a column line output of the OR array is to be fed into a column line input of the AND array, the OR column lines are located physically close to the AND column lines. This organization simplifies the logic design and also reduces the length of wiring from output to input outside the array.

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PLA With Intermixed AND and OR Arrays

A programmable logic array (PLA) is formed with identical elements that interconnect crossover points of the row and column lines of both the AND array and the OR array. Where a column line output of the OR array is to be fed into a column line input of the AND array, the OR column lines are located physically close to the AND column lines. This organization simplifies the logic design and also reduces the length of wiring from output to input outside the array.

A PLA has column input lines, column output lines, and row lines with diodes or other interconnecting elements at selected crossover points of the arrays. Logic signals that are applied to the input column lines propagate across the row lines where an interconnection element is located, and the interconnection elements along a row line form the OR logic function of the logic signals that are applied to the input lines. Inverters at these inputs cooperate with the interconnection elements to provide an overall NOT-OR or AND-INVERT function on the row lines, and the part of the array formed by the column lines is called the AND array. The column output lines similarly form the OR logic function of the signals that are formed on the row lines by the AND array, and inverters at the column output lines give the PLA an overall AND-OR function.

In the PLA of the drawing the interconnections of the array are formed identically by Schottky diodes 2 so that a column line forms...