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Browse Prior Art Database

Binary Up/Down Counter

IP.com Disclosure Number: IPCOM000048428D
Original Publication Date: 1982-Jan-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Hack, GE: AUTHOR

Abstract

A series of shift register latches (SRLs) 10 can be configured as an up/down counter. For each shift of the SRL shift clocks, the output, taken at selected points, will be incremented or decremented by one. The illustrated 15-position shift register, after being initialized to "zeros", will count from 0 to 15 decimal, with the binary representation displayed at the four outputs B(3), B(2), B(1), B(0). The out-of-phase output is used is used as the feed-forward input to each group of SRLs. For example, the B output from SRL position 4 is the input to SRL position 7. This technique can be continued in similar fashion to build counters of larger capacity. In general, the B output has a binary weight of 2/N/and will also have 2/N/ SRLs in that stage.

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Binary Up/Down Counter

A series of shift register latches (SRLs) 10 can be configured as an up/down counter. For each shift of the SRL shift clocks, the output, taken at selected points, will be incremented or decremented by one. The illustrated 15-position shift register, after being initialized to "zeros", will count from 0 to 15 decimal, with the binary representation displayed at the four outputs B(3), B(2), B(1), B(0). The out-of-phase output is used is used as the feed-forward input to each group of SRLs. For example, the B output from SRL position 4 is the input to SRL position 7. This technique can be continued in similar fashion to build counters of larger capacity. In general, the B output has a binary weight of 2/N/and will also have 2/N/ SRLs in that stage.

If appropriate outputs are chosen both the count up and count down functions are available simultaneously. For example, if the B(0), B(1), B(2) and B(3) outputs are used for counting up, the count down function is simultaneously available at the B'(0), B'(1), B'(2), and B'(3) outputs. The chart below shows the SRL values during counting.

The counter may be started at any point by shifting in the seed or contents of the SRL for a particular decimal count. Counting from that point can commence by stepping the shift clocks.

The inverse of the above can be achieved by initially loading the SRL with all "ones". The B(0), B(1), B(2), B(3) outputs will then count down, and the B'(0), B'(1), B'(2), and B(3...