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Polysilicon Etching in CF(4)+O(2)+Xe

IP.com Disclosure Number: IPCOM000048464D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Bennett, RS: AUTHOR [+3]

Abstract

This article describes a reactive ion etching (RIE) procedure for polysilicon in a DPSFET (double polysilicon field-effect transistor) process. The procedure requires a reactor with only one RF electrode. Two methods are presently known for etching polysilicon in a DPSFET process. Both of these processes require etching to be carried out in a particular reactor that has two independent electrodes, that is, in a flexible diode reactor. A process is described herein for etching polysilicon with a sloped profile and an acceptable polysilicon-to-SiO(2) etch rate ratio in the much more available RIE system which has only one RF-electrode.

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Polysilicon Etching in CF(4)+O(2)+Xe

This article describes a reactive ion etching (RIE) procedure for polysilicon in a DPSFET (double polysilicon field-effect transistor) process. The procedure requires a reactor with only one RF electrode. Two methods are presently known for etching polysilicon in a DPSFET process. Both of these processes require etching to be carried out in a particular reactor that has two independent electrodes, that is, in a flexible diode reactor. A process is described herein for etching polysilicon with a sloped profile and an acceptable polysilicon-to-SiO(2) etch rate ratio in the much more available RIE system which has only one RF- electrode.

Essential to this process is the addition of Xe to CF(4)+O(2).

The heavy Xe atoms serve to reduce the average energy of ionized etching species, such as CF(3)/+/, by scattering and/or charge exchanging in the cathode dark space. As a result, the etch rate of SiO(2) falls to a value of Approximately 1/10 that of n+ polysilicon.

The etch rate of polysilicon remains high because it is etched by relatively low energy radicals in the plasma. The desired etch slope of Approximately 60 Degrees is obtained by adjusting the pressure of the discharge. An n+ polysilicon-to-SiO(2) etch rate ratio of Approximately 10 to 1 with an etch slope of Approximately 60 Degrees is obtained under the following conditions: Flow Rate Xe - 38 sccm

CF(4) - 15 sccm

O(2) - 5 sccm

Total Pressure - 200 mtorr

RF Power - 0.27 W/s...