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Browse Prior Art Database

Direct Access To Transmit Data And Receive Data On Telecommunication Adapter

IP.com Disclosure Number: IPCOM000048502D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Benignus, DM: AUTHOR [+2]

Abstract

A telecommunication adapter uses standard integrated circuit modules on a common card, and these integrated circuit modules provide the adapter with a number of automatic functions. Integrated circuit 1 is a programmable communication interface commonly referred to as a universal synchronous/asynchronous receive/transmit (USART) circuit. Integrated circuit 2 is a programmable HDLC/SDLC protocol controller providing high level or synchronous data link control. Integrated circuit 1 includes a framing checking logic and a parity checking logic, and integrated circuit 2 includes 0 bit insertion and deletion logic and cyclic redundancy checking (CRC) logic.

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Direct Access To Transmit Data And Receive Data On Telecommunication Adapter

A telecommunication adapter uses standard integrated circuit modules on a common card, and these integrated circuit modules provide the adapter with a number of automatic functions. Integrated circuit 1 is a programmable communication interface commonly referred to as a universal synchronous/asynchronous receive/transmit (USART) circuit. Integrated circuit 2 is a programmable HDLC/SDLC protocol controller providing high level or synchronous data link control. Integrated circuit 1 includes a framing checking logic and a parity checking logic, and integrated circuit 2 includes 0 bit insertion and deletion logic and cyclic redundancy checking (CRC) logic. The automatic functions performed by the logic on these integrated circuits cannot be verified via normal wrap or loop-back procedures because there is no way to create an error for diagnostic testing purposes.

This problem is eliminated by direct control of the transmit data (IXD) via an output port bit from integrated circuit 7 before TxD is wrapped to the receive data (RxD) signal. Integrated circuit 7 is a programmable parallel peripheral interface and allows incorrect data to be generated in the wrap mode via system software so that the adapter's automatic functions can be verified without operator intervention, test equipment, or a remote test center. As shown in the figure, bit 1 of port C of integrated circuit 7 is ORed in OR gate...