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Maintaining Parity In Memory Modules

IP.com Disclosure Number: IPCOM000048532D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Vogelsberg, RE: AUTHOR

Abstract

Memory modules typically have space for storing a data byte but allow no space for storage of the parity bit with the byte. In the past this has been solved by dedicating a separate smaller memory module, if available, to store the parity bits. To better use the memory space, the system shown above uses paired memory modules of the same size, with each module containing data bytes plus parity bits of data bytes stored in its paired module. This permits substantially full use of the memory space of both modules where the modules are the same size.

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Maintaining Parity In Memory Modules

Memory modules typically have space for storing a data byte but allow no space for storage of the parity bit with the byte. In the past this has been solved by dedicating a separate smaller memory module, if available, to store the parity bits. To better use the memory space, the system shown above uses paired memory modules of the same size, with each module containing data bytes plus parity bits of data bytes stored in its paired module. This permits substantially full use of the memory space of both modules where the modules are the same size.

In operation, read-only store memories 10 and 12, which are 2K memory modules storing 8-bit bytes, are each addressed so that 256 bytes in each memory are allotted to parity and 1,792 bytes are allotted to data. Since the parity bits are stored as 8-bit bytes, only 224 parity bit bytes are actually required in each memory, for data byte parity. The remianing memory space, 32 bytes (256 less 224), is used to provide parity for the parity bytes.

The memory modules are addressed as follows. Address bits 3-10 are applied through gated driver 14 to each memory module. Address bits 0-2 and a constant address of 000 are applied to memory module 10 via gated drivers 16 and 18, respectively. Similarly, address bits 0-2 and a constant address of 000 are applied to memory module 12 through gates 20 and 22 respectively.

When a memory module is addressed to read out a data byte, it is addressed wi...