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Browse Prior Art Database

MTL Array Restore Technique

IP.com Disclosure Number: IPCOM000048553D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Hargrove, M: AUTHOR [+4]

Abstract

This technique includes a circuit that is triggered to restore an array of merged transistor logic (MTL) cells to a reference that tracks with the cells and then resets itself automatically. By employing this technique, the need for generating a fixed restore time is eliminated, resulting in an improved array cycle time. An MTL memory cell is described in some detail in U.S. Patent 4,158,237.

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MTL Array Restore Technique

This technique includes a circuit that is triggered to restore an array of merged transistor logic (MTL) cells to a reference that tracks with the cells and then resets itself automatically. By employing this technique, the need for generating a fixed restore time is eliminated, resulting in an improved array cycle time. An MTL memory cell is described in some detail in U.S. Patent 4,158,237.

The circuit in Fig. 1 comprises an array of four similar cells CO, C1, C2 and C3 with associated circuits necessary to restore the cells, MTL cell CO being shown in some detail.

During an array read/write operation, it is necessary to discharge unselected word lines which turn off the associated injector transistors T0 and T1 connected to the cross-coupled transistors T2 and T3. Upon completion of the read/write operation, the word lines are restored to a standby condition in which the injector transistors T0 and T1 are again turned on. In the standby condition data integrity is assured against charge leakage and charge transfer, and the array is prepared for subsequent addressing and read/write operations.

The restore circuit indicated in block form in Fig. 1 is illustrated in detail in Fig. 2. Select pulses SEL applied to the restore circuit are generated by a chip select pulse and reset by the voltage conditions on unselected word lines during discharge thereof, or by subsequent changes in chip select.

In the operation of the restore circuit, c...