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Electrically Programmable SBD Storage Cells

IP.com Disclosure Number: IPCOM000048555D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 3 page(s) / 62K

Publishing Venue

IBM

Related People

Bergeron, DL: AUTHOR [+3]

Abstract

Storage cells which include a Schottky barrier diode (SBD) and a P+ region having an alterable threshold region disposed between the diode and the P+ region are used in electrically programmable read-only memories.

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Electrically Programmable SBD Storage Cells

Storage cells which include a Schottky barrier diode (SBD) and a P+ region having an alterable threshold region disposed between the diode and the P+ region are used in electrically programmable read-only memories.

In one embodiment, illustrated in Fig. 1, the electrically programmable read- only memory includes a silicon substrate 10 of P type conductivity with an N epitaxial layer 12 and an N+ subcollector 14. First and second p+ regions 16 and 18 are formed at the surface of layer 12, and an N+ region 20 is located within the first P+ region 16. A layer of silicon dioxide 22 having suitable openings therein is formed on the surface of the layer 12. Disposed in contact with the N epitaxial layer 12 is an aluminum-copper-silicon contact 24 forming a Schottky barrier diode at the interface between the contact 24 and the surface of layer 12. A thin dielectric layer 26, made preferably of silicon dioxide, is formed on the surface of the layer 12 from contact 24 so as to extend over the first P+ region
16. A layer of silicon-rich silicon dioxide SiO(x) 28 is disposed over the thin dielectric layer 26. An electrode 30 contacts the N+ region 20, an electrode 32 contacts the second P+ region 18, and a passivating layer 34, preferably made of quartz, is disposed over the entire upper surface of the structure.

The cell in Fig. 1 is programmed by selectively producing an inversion layer, indicated by reference 36, between the Schottky barrier diode and the first P+ region 16. The inversion is produced by reverse biasing the Schottky barrier diode into deep avalanche while maintaining the first P+ region at a constant potential. Electrons produced by the reverse biased Schottky barrier diode have enough energy to accelerate toward positive charge in quartz layer 34 over the silicon-silicon dioxide interface and lodge in the silicon-rich silicon dioxide layer
28. The presence of the electrons over the thin dielectric layer 26 causes the surface of the N- epitaxial layer 12 to invert, producing the inversion layer 36 which connects the first P+ diffusion region 16 to the Schottky barrier diode. Programming can be achieved by forcing 200 microamperes through the Schottky barrier diode in the reverse direction for approximately 60 seconds. The voltage on the first P+ region 16 is held at a constant potential by applying appropriate potentials to the electrode 32 and layer 12 to turn on the PNP transistor formed by the first and second P+ regions and the N- epitaxial layer 12.

The charge trapped in th...