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Self Biasing Arrangement For Linear Circuits

IP.com Disclosure Number: IPCOM000048557D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Harroun, TV: AUTHOR

Abstract

An amplifier is provided with a self-biasing circuit 10 which sets the quiescent operating point of an amplifying circuit A to the maximum point of incremental gain and adjusts the operating point to maintain a minimum of distortion.

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Self Biasing Arrangement For Linear Circuits

An amplifier is provided with a self-biasing circuit 10 which sets the quiescent operating point of an amplifying circuit A to the maximum point of incremental gain and adjusts the operating point to maintain a minimum of distortion.

The amplifying circuit A, as indicated in Fig. 1, has biasing circuit 10 which includes depletion transistors T1 and T2 and a capacitor C connected between the output and input of amplifying circuit A. Transistors T1 and T2 set the operating point of the inverting amplifying circuit A to the point 12 of its linear operating range, as indicated in the typical transfer characteristic curve a in Fig.
2. Generally, this DC operating point 12 is at or near the point yielding the largest incremental gain for the amplifying circuit A. The biasing circuit 10 compensates for changes in the transfer characteristic by shifting the operating point, as illustrated by curves b and c, raising the operating point as the gain of the amplifying circuit is decreased.

With an input signal applied to amplifying circuit A, transistors T1 and T2 either charge or discharge capacitor C depending upon the relative sizes of transistors T1 and T2 and the input and output voltage swings. Node X either increases or decreases in voltage, shifting the operating point up or down, respectively, the transfer characteristic curve, adjusting the operating point to maintain a minimum of distortion. Capacitor C functions as a l...