Browse Prior Art Database

Signature Generator And Monitor For Microprocessor System

IP.com Disclosure Number: IPCOM000048573D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Beal, DS: AUTHOR [+2]

Abstract

A signature analyzer has a greater utility and efficiency for trouble shooting a microprocessor system when using a counting circuit to isolate a particular series of addresses for signature. The counting circuit described below permits a signature analyzer to be used when addresses are produced either by a microprocessor or an external counter. The analyzer is controlled by the clock and start-stop signals of the counting circuit.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Signature Generator And Monitor For Microprocessor System

A signature analyzer has a greater utility and efficiency for trouble shooting a microprocessor system when using a counting circuit to isolate a particular series of addresses for signature. The counting circuit described below permits a signature analyzer to be used when addresses are produced either by a microprocessor or an external counter. The analyzer is controlled by the clock and start-stop signals of the counting circuit.

Referring to the figure, the address buses of microprocessing unit (MPU) 1 and storage devices 2 are connected through buffer 3 to main bus 4A. The data bus of the microprocessor is connected through buffer 5 to the bus 4D of the storage devices. A counter 6 is also connected to main buses 4A and 4D through buffers 7. Buffers 3, 5 and 7 serve to isolate their respective units from the main buses and each can be selectively rendered operable by individual switches (not shown). An oscillator clock 8 drives counter 6 and timing unit 9 from which a choice of two clock frequencies is available. The timing unit output and address information are decoded at 10 to select the portion of storage to be examined.

An address series to be analyzed is selected by setting the desired start and stop counts at registers 11 and 12, each effective through respective gating buffers 13 and 14 to provide their counts to a compare circuit 15. These counts are compared with the changing addresses on main bus 4A. As the address count advances, an equal output from the compare circuit alters DC flip-flop 16 to provide a start signal to the signature analyzer (not shown). The equal signal then disables the start count and enables the stop count so that a subsequent equal signal provides a stop signal for the signature analyzer.

The signature analyze...