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Paging Error Correction For Intermittent Errors

IP.com Disclosure Number: IPCOM000048611D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Aichelmann, FJ: AUTHOR [+2]

Abstract

Intermittant errors are corrected, using existing paging store memory system facilities, by application of error correcting code (ECC) and cyclic redundancy code (CRC) techniques. The ECC is carried as extra bits in the word, and the CRC is carried as extra words at the end of the block/page.

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Paging Error Correction For Intermittent Errors

Intermittant errors are corrected, using existing paging store memory system facilities, by application of error correcting code (ECC) and cyclic redundancy code (CRC) techniques. The ECC is carried as extra bits in the word, and the CRC is carried as extra words at the end of the block/page.

A word with errors in excess of the ECC correctability coverage is bit manipulated by an algorithm until it clears through the error checker. A list of potentially correct "good word" candidates is produced in this manner under supervision by the memory controller microprocessor. The candidate words then are run through the CRC checker to find the one unique word which is valid. If such a word is present among the candidate words, it is the corrected word. If none or more than one word completes the CRC check, the error remains unresolved.

The flow chart depicts the overall error correction procedure and includes blocks 1, 2 and 3 which represent the above-described generation of candidate words, CRC check and detection of a single valid candidate, respectively. The remaining blocks of the flow diagram are self-explanatory.

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