Browse Prior Art Database

MOS LSI Driver Testing Method

IP.com Disclosure Number: IPCOM000048635D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Beckham, HR: AUTHOR [+4]

Abstract

In testing MOS LSI chips, it is desirable to be able to control the state of the off-chip drivers and the "enable" input to tri-state drivers. Such control makes it possible to ensure that all drivers are functional, and the tri-state drivers can be properly disabled.

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MOS LSI Driver Testing Method

In testing MOS LSI chips, it is desirable to be able to control the state of the off-chip drivers and the "enable" input to tri-state drivers. Such control makes it possible to ensure that all drivers are functional, and the tri-state drivers can be properly disabled.

The present state of the art is to control the state of the off-chip drivers by means of test patterns, which is generally complex and requires the chip to be at least partly functional. "Enable" functions may be similarly controlled, or may be brought out to test pins. The method proposed has neither of these disadvantages, and has the additional advantage that all drivers may be controlled simultaneously.

The proposed method requires that the power and ground pins and on-chip buses that service the logic circuits be physically separate from those that service the drivers. This is good practice for noise control, since drivers introduce relatively large current transients into the buses, and it will be shown that it also greatly simplifies testing the drivers.

Referring to Fig. 1, the driver 2 has the following characteristics:
1) it is noninverting, and
2) a "high" enable level input sets a tri-state driver in the

high impedance state.

In the proposed method, the logic portion 4 of the chip (represented by the inverter circuit in Fig. 1) is made equivalent to the circuit in Fig. 2 when the V pin 5 and G pin 6 are temporarily connected as shown. Since device A in Fig....