Browse Prior Art Database

Programmable Voltage Variable Capacitor

IP.com Disclosure Number: IPCOM000048739D
Original Publication Date: 1982-Mar-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Kalter, HL: AUTHOR [+2]

Abstract

A programmable voltage-variable integrated circuit capacitor is provided by the use of a non-volatile memory device of the floating-gate type in which various pre-set threshold voltages are used to change the capacitive coupling between a control electrode and the source drain terminals of the floating-gate MOSFET.

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Programmable Voltage Variable Capacitor

A programmable voltage-variable integrated circuit capacitor is provided by the use of a non-volatile memory device of the floating-gate type in which various pre-set threshold voltages are used to change the capacitive coupling between a control electrode and the source drain terminals of the floating-gate MOSFET.

Fig. 1 illustrates schematically the device structure of the programmable capacitor TC which includes semiconductor substrate 10, having commonly coupled N-type source and drain regions attached to terminal E3. A floating gate electrode 12 overlies the channel region between the source and drain. Overlying floating gate electrode 12 are two additional electrodes 14 and 16 coupled to terminals E1 and E2, respectively. The dielectric between electrode 14 and floating-gate electrode 12 is preferably a dual-electron injector structure of the type described in the article "Electrically Alterable Memory Using a Dual Electron Injector Structure," D. J. DiMaria, et al, IEEE Electron Device Letters EDL1, 179-181 (September 1980). The equivalent electrical schematic of the device of Fig. 1 is shown in Figs. 2 and 3. Depending upon the polarity and quantity of charge present on floating gate 12, the effective capacitance between terminal E3 and terminal E2 can be varied in a non-volatile manner.

Fig. 2 is a schematic circuit diagram of the device of Fig. 1 showing the various capacitances present when the charge of floating gate 12 is insufficient to cause inversion of the channel region. Capacitor Cd represents the diode capacitance of the source and drain diffusions. Capacitor CM represents the Miller or gate to source-drain, coupling capacitance. Capacitors C1 and C2 represent the coupling capacitance between electrodes 14 and 16 and floating gate 12. Capacitor Cox represents the relatively large capacitances between floating gate 12 and substrate 10. The effective coupling capacitance between terminals E2 and E3 equals that of relatively small serially-connected capacitors CM and C1.

When the charge on floating gate 12 is sufficient to cause an inversion layer to form in the channel region, a channel-to-substrate capacitance is created, as represented by capacitor Cch in Fig. 3, and places the large capacitor Cox in series with terminals...