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Browse Prior Art Database

Computer Aided Thermal Test System

IP.com Disclosure Number: IPCOM000048788D
Original Publication Date: 1982-Mar-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 43K

Publishing Venue

IBM

Related People

Dolowitz, AP: AUTHOR [+4]

Abstract

This system pertains to the testing of complex thermal test vehicles, e.g., large multi-chip modules, cards, boards, etc. Such vehicles are generally populated with a multiplicity of small heater elements, each containing one or more embedded temperature sensors. Examples of these are silicon thermal chips and paste resistor modules.

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Computer Aided Thermal Test System

This system pertains to the testing of complex thermal test vehicles, e.g., large multi-chip modules, cards, boards, etc. Such vehicles are generally populated with a multiplicity of small heater elements, each containing one or more embedded temperature sensors. Examples of these are silicon thermal chips and paste resistor modules.

The object of the test vehicle is to simulate the thermal paths corresponding to geometrically similar product assemblies. Such vehicles do have somewhat common test requirements, e.g., (1) multiple power sources, (2) thermocouples to monitor temperatures external to the heater elements, (3) constant current supplies for Kelvin or two-point measurement of thermistor and diode sensor, (4) voltmeters for measurements, and (5) read-relay scanners to select the desired measurement parameter.

The system described here eliminates several problems previously encountered in the application of manual and semi-automatic testers, namely: 1. Personalization

2. Power Mapping

3. Power Setting

4. Data Acquisition

Personalization The complexity of wiring a 100+ chip/1800 pin thermal test vehicle mandates that each new vehicle have new functional pin assignments. This invention accommodates this via a patch panel receiver board (5 in figure) containing 6480 points. The cross-point switching problem, vehicle to vehicle, is solved using a pre-pinned and wire-wrapped personalization panel unique to each test vehicle which is cammed into the receiver board prior to the start of testing.

Power Mapping To circumvent the use of 100+ power supplies (one per chip), the system utilizes only twelve DC supplies (1 in figure). A three-level pin matrix switch 3 permits the assignment of each chip to any one of these supplies by the insertion of only two pins. Thus consistent with the limit of 12 voltage levels up to 180 chips may be zoned to approximate any desired power map. Added flexibility in powering is afforded by a bus-link network 2. This feature permits referencing the polarity of the power supplies to a common bus or to each other without rewiring. This accommodates test vehicles with mixed chips which have been internally wired such that, e.g., some require positive and some negative powering relative to a common bus. Rectifiers in the output legs of the supplies ensure the isolation of the supplies operating at different voltages.

Power Setting The variability of chip heater resistance with temperature causes an interaction between groups on different supplies, making the setting of desired power levels a laborious cut-and-dry manual procedure. This system inco...