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Browse Prior Art Database

Dielectric Isolation Process

IP.com Disclosure Number: IPCOM000048918D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Hulvey, MD: AUTHOR [+2]

Abstract

A process is provided which produces a single-crystal semiconductor segment entirely isolated by dielectric material. A silicon dioxide layer is located below the segment with trenches filled with an oxide surrounding the sides of the segment.

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Dielectric Isolation Process

A process is provided which produces a single-crystal semiconductor segment entirely isolated by dielectric material. A silicon dioxide layer is located below the segment with trenches filled with an oxide surrounding the sides of the segment.

As indicated in Fig. 1, a P type silicon substrate 10 is oxidized to grow a silicon dioxide layer 12 in which are formed first and second opening 14 and 16 to expose first and second surfaces 18 and 20 on substrate 10. A layer of silicon 22 is deposited in the form of an N+ doped polysilicon onto the silicon dioxide layer 12 and onto surfaces 18 and 20 of substrate 10. By using a known laser- induced melting process, the polysilicon in layer 22 is heated beginning at the surfaces 18 and 20 to recrystallize all of the polysilicon into a single crystal, using the exposed single-crystal silicon at the surfaces 18 and 20 of silicon substrate 10 as a seed. A relatively thick N type epitaxial layer 24 is grown on the single- crystal silicon layer 22. Appropriate N+ and P regions are then formed in layer 24 by known diffusion or implant techniques to provide any desired device 26, such as an NPN transistor, as indicated in Fig. 2. By forming a deep trench 28 down into substrate 10 and filling it with insulating material 30, e.g., silicon dioxide, the device 26 is completely isolated from other devices or elements that may be formed on substrate 10. If desired, the trench 28 may be made prior to forming...