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Low Power Write Circuit For Fast VLSI Arrays

IP.com Disclosure Number: IPCOM000048995D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Dussault, RD: AUTHOR [+3]

Abstract

Random-access memory arrays require fast writing ability when used for cache memory applications. Usually this fast writing is achieved by powering up the write circuits at the expense of high chip power dissipation. In some cache array designs, as much as 20 to 30 percent of the total chip power is consumed by the write circuitry.

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Low Power Write Circuit For Fast VLSI Arrays

Random-access memory arrays require fast writing ability when used for cache memory applications. Usually this fast writing is achieved by powering up the write circuits at the expense of high chip power dissipation. In some cache array designs, as much as 20 to 30 percent of the total chip power is consumed by the write circuitry.

By dotting the write function with the bit decode circuitry, thereby making the decode driver serve a dual purpose of bit selection and writing, a substantial reduction in chip power and silicon area can be realized. Additionally, if this dotting is performed through a capacitively coupled clamp diode, a fast write capability is achieved. This article describes how a write circuit is dotted with all the bit decoders of the array functions to control the output of the decode driver for either the read or the write operation. In the read mode (node WG low), transistors 7 and 8 are off, thereby clamping the selected bit decode node A to a normal read level through clamp diode Tbc. For the deselected decoders, the anode of Tbc (node A) is forced low by the conducting decode transistors, thereby turning off Tbc and preventing any signal from the write circuit being impressed on those de-selected bit lines. Writing is accomplished by raising WG high and turning on current switch transistors 7 and 8. The cathode potential of clamp diode Tbc (node B) is charged very quickly through the current switc...