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Gallium Arsenide Chip Package with Matched Impedance Transmission Lines

IP.com Disclosure Number: IPCOM000049024D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Andrade, TL: AUTHOR [+2]

Abstract

The signal frequencies typically handled by conventional gallium arsenide integrated circuits are so high that the printed circuit interconnections between the circuit elements on the chip itself must have a matched characteristic impedance. This has been accomplished in the prior art where the integrated circuit elements and printed circuit interconnection lines are formed on one side of the chip and a groundplane conductor is formed on the opposite side of the chip.

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Gallium Arsenide Chip Package with Matched Impedance Transmission Lines

The signal frequencies typically handled by conventional gallium arsenide integrated circuits are so high that the printed circuit interconnections between the circuit elements on the chip itself must have a matched characteristic impedance. This has been accomplished in the prior art where the integrated circuit elements and printed circuit interconnection lines are formed on one side of the chip and a groundplane conductor is formed on the opposite side of the chip.

A technique is disclosed herein for providing a groundplane 2 in close proximity to the printed circuit transmission lines 4 on a gallium arsenide chip 6. This is achieved, as shown in the figure, by forming the gallium arsenide chip 6 as a flip-chip structure and employing solder ball connectors 8 on the circuit side of the chip 6 to electically and mechanically connect the chip to an aluminum oxide substrate 10, as described in IBM Technical Disclosure Bulletin 16, 2675 (January 1974). Printed circuit transmission line structures 4 formed on the circuit side of the gallium arsenide chip 6 are in close proximity to the upper surface of the aluminum oxide substrate 10. A conductive groundplane 2 may thus be formed on the surface of the aluminum oxide substrate 10 and be separated by a precisely defined air gap 12 from the printed circuit transmission line structures 4 on the gallium arsenide chip. The precise positioning of the ...