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Cyclic De-Multiplexer Control System

IP.com Disclosure Number: IPCOM000049066D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Beaven, PA: AUTHOR

Abstract

Consider the problem of routing data from n time staggered inputs of a logic circuit to m outputs when m is less than m If m divides exactly into n, the mapping of each subset of (n out of n) inputs to the m output lines can be fixed and the solution is relatively simple. However if n/m produces a remainder, the mapping from input to output is a variable function of time.

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Cyclic De-Multiplexer Control System

Consider the problem of routing data from n time staggered inputs of a logic circuit to m outputs when m is less than m If m divides exactly into n, the mapping of each subset of (n out of n) inputs to the m output lines can be fixed and the solution is relatively simple. However if n/m produces a remainder, the mapping from input to output is a variable function of time.

The solution is illustrated in Fig. 1 for the case n=5 and m=3.

Three one out of 5 selectors feed the 3 outputs. The selectors are arranged such that when one of the 5 control inputs is active, one of the input lines is routed to the output. Hence, by cycling a single 'one' in the shift register and staggering the control to the shift register connections as shown, the required function is achieved.

Fig. 2 shows the timing of the input data which arrives in the sequence 1 2 3 4 5, 6 7 8 9 10, etc. The corresponding output data is sequenced 1 2 3, 4 5 6, 7 8 9. 10 ... on the 3 output lines.

The technique is applicable in the general case for any values of m and n, and a minor variation is to replace the shift register by a counter feeding a 1 out of n decoder.

This arrangement achieves a cyclic time variable mapping from n inputs to m outputs, provides a regular logic structure which is suitable for integration, provides a major improvement over designs using standard de-multiplexers with coded control inputs. and has application in the de-scrambling of data d...