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Signed Magnitude Representation Converter for Bubble Memory

IP.com Disclosure Number: IPCOM000049085D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 6 page(s) / 37K

Publishing Venue

IBM

Related People

Bongiovanni, G: AUTHOR [+2]

Abstract

A magnetic bubble domain apparatus is described which allows numbers in signed-magnitude representation to be compared correctly. Usually a "1" (i.e., a bubble) cannot be used as the sign-bit for negative numbers. This is because bubble comparators rely on the first bubble (representing the first significant bit) to appear in one and only one of the data streams. In the bubble comparator of this article, a new way is described for sign-bit representation. This new number representation is called B1's-complement, and a simple read-free device for converting numbers represented in the signed-magnitude representation to the B1's complement representation is described.

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Signed Magnitude Representation Converter for Bubble Memory

A magnetic bubble domain apparatus is described which allows numbers in signed-magnitude representation to be compared correctly. Usually a "1" (i.e., a bubble) cannot be used as the sign-bit for negative numbers. This is because bubble comparators rely on the first bubble (representing the first significant bit) to appear in one and only one of the data streams. In the bubble comparator of this article, a new way is described for sign-bit representation. This new number representation is called B1's-complement, and a simple read-free device for converting numbers represented in the signed-magnitude representation to the B1's complement representation is described.

The B1's-complement is defined as follows: For positive numbers, sign-bit 1, followed by the number itself, is assigned. For negative numbers, the conventional l's-complement. is used, but the sign-bit is changed to 0. That is, the sign-bit of the conventional 1's-complement representation is changed to its complement. Table 1 shows an example. (see original). Table 1 (leftmost bit is the sign-bit)

Comparison of positive and/or negative numbers will always produce a correct result. Implementation of the Number Representation Converter:

In general, if the number representation in one storage medium is changed, it may cause problems in its communication with other parts of the system, which still use the conventional representation, unless this change can be made completely transparent outside the storage medium. To this end, a very simple device is implemented in the bubble memory, which will be referred to as the number representation converter (NRC). This is essentially the "exclusive-OR" logic gate described in (1), but with one specific input for the present purposes (Fig. 1).

Suppose the number N to be converted is represented in bits as x(R)x(R-1)
...x(1)x(0), where x(R) is the sign-bit. This string of bits will be fed into the NRC (in the order of x(R),x(R-1),...,X(o)) so that the output will be x(R)'x(R-1)',...x(0)', where x'(i) is the value of the i-th bit in the new representation of N.

Specifically, we have two strings of bubbles as input to the NRC: one is the number x(R)x(R-1) ...x(0), and the other is a string b(R),b(R-1),...,b(0) (called clock bubbles), so that the two strings have exactly the same length.

If the two bits of the strings currently entering the NRC are denoted by A and B, then the NRC just performs the exclusive-OR logic function. The output will be A+B. Specifically, 1. If the clock bubble b(i) = 0, the bit x(i) of the

other string will output from the NRC unchanged.

2. If the clock bubble b(i) = 1, the bit x(i) of the

other string will output from the NRC in complemented

form: x(i). This is achieved physically as follows:

If x(i) = 0, then b(i) will take its place on the

output path. If x(i) = 1, then the two bubbles will

1

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repel each other and will go out on the two v...