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Enhancement Of 'Move Long' Instruction For A Small System 1370 Machine With 'Store In Cache'

IP.com Disclosure Number: IPCOM000049090D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Schwengler, MO: AUTHOR

Abstract

The 'Move Long'(MVCL) instruction is used frequently to clear large portions of storage (e'g.. 2 approaches 8K bytes). For a 'Store in Cache' machine this sets large portions of the cache 2 to momentarily meaningless values. Eventually these lines have to be 'castout' if their entry is required for other references.

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Enhancement Of 'Move Long' Instruction For A Small System 1370 Machine With 'Store In Cache'

The 'Move Long'(MVCL) instruction is used frequently to clear large portions of storage (e'g.. 2 approaches 8K bytes). For a 'Store in Cache' machine this sets large portions of the cache 2 to momentarily meaningless values. Eventually these lines have to be 'castout' if their entry is required for other references.

The enhancement is for small IBM 1370 machines which do not have a 'castout buffer'. The idea is to use special hardware 4 and 6 to control the storing of the padding character of the MVCL into main storage (MS) directly rather than into the cache.

When the processor microcode determines the case of an MVCL instruction with the second operand shorter than the first one (which results in storing of the 'pad' character into MS) the following actions take place:
1. Check if one or more cache lines have to be padded.

If no, total line approaches go to 7.
2. If line is in cache, invalidate line in cache directory.
3. Force 'cache data out register' (CDOR) to pad character.
4. Load address register for main storage addressing.
5. Transfer CDOR N times under control of 'MVCL stepping

control' to

Length of cache line

divided by

MS (N=

Width of CDOR.
6. Decision by microcode if another line has to be padded.

Yes approaches go to 2. No approaches 7. (Step 5 and

6 can be overlapped).
7. Normal continuation.

In present processor design the MVCL stores normally into cache....