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Socket Assembly for Pinless Array Integrated Circuit Package

IP.com Disclosure Number: IPCOM000049120D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 74K

Publishing Venue

IBM

Related People

Redmond, RJ: AUTHOR [+2]

Abstract

In packaging semiconductor chips, one technique is to provide a ceramic substrate on which the chip is mounted. Vias filled with metal, such as W or Mo, extend through the ceramic substrate. These vias are then connected to pins, which insert into cards. One mode of connecting the vias to pins is by means of a pin array socket assembly which supports the required pins and attaches to the ceramic substrate to bring the pins into contact with the vias. An improved pin array socket is described which will accommodate a large number of pins in a small area.

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Socket Assembly for Pinless Array Integrated Circuit Package

In packaging semiconductor chips, one technique is to provide a ceramic substrate on which the chip is mounted. Vias filled with metal, such as W or Mo, extend through the ceramic substrate. These vias are then connected to pins, which insert into cards. One mode of connecting the vias to pins is by means of a pin array socket assembly which supports the required pins and attaches to the ceramic substrate to bring the pins into contact with the vias. An improved pin array socket is described which will accommodate a large number of pins in a small area.

Fig. 1 is a bottom plan view of a ceramic substrate showing the terminating pads of the metal-filled vias.

Fig. 2 is an exploded perspective view of the improved pin array socket assembly and the module containing the ceramic substrate.

Fig. 3 is a detailed sectional view of a portion of the pin array socket assembly.

Fig. 4 is a perspective view of the pin array socket assembly secured to the substrate and cover therefore.

A conventional ceramic substrate 10 is provided, as shown in Fig. 1, on which one or more integrated circuit chips (not shown) are mounted on the reverse side. Gold via termination pads 12 are shown on the obverse side. These pads 12 terminate the metal-filled vias through the ceramic which is connected with the chips on the reverse side in a conventional manner.

As seen in Fig. 2, the ceramic substrate 10 is provided with a cover 14 which is in the form of a finned structure so as to act as a heat sink. The improved pin array socket assembly includes a base section 16 and e platen section 18. The platen section 18 is formed with an array of openings 20 which correspond in position and location with the pads 12. Similarly, the base section 16 is formed with an array of openings 22 which conform to the number of end generally with the lo...