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IBM System/370 Channel Unibus Interface

IP.com Disclosure Number: IPCOM000049140D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 3 page(s) / 80K

Publishing Venue

IBM

Related People

Firth, SR: AUTHOR [+2]

Abstract

Input/Output (I/O) devices are capable of transferring data to a processor's main storage through an I/O interface. Typically, these devices use a specific interface protocol to transfer the data. Frequently it is desirable to attach devices to an incompatible interface and, for these cases, it is necessary to provide an adapter which will allow communication from the device to memory.

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IBM System/370 Channel Unibus Interface

Input/Output (I/O) devices are capable of transferring data to a processor's main storage through an I/O interface. Typically, these devices use a specific interface protocol to transfer the data. Frequently it is desirable to attach devices to an incompatible interface and, for these cases, it is necessary to provide an adapter which will allow communication from the device to memory.

The subject of this article is an IBM System/370 channel/UNIBUS (a particular I/O bus) converter that allows peripherals designed for the UNIBUS to be attached to a S/370 channel. The device (Fig. 1) consists of hardware, a port, for attaching to a S/370 channel and another port for connecting to the UNIBUS. A microprocessor handles the interface sequences and data transfer set-up procedures for each port. A high speed storage (64K bytes) acts as a buffer for the data transferred between the channel and the UNIBUS.

The I/O device attached to the UNIBUS adheres to the standard protocol of UNIBUS operation. The method in which devices are controlled is described as memory-mapped. Registers in the device are assigned addresses similar to memory. Control functions are assigned to these registers, and then the individual bits of the register cause control operations to occur. In order for a S/370 channel to control the devices using the registers, three new I/O commands were created (Fig. 2). The first, "Set UNIBUS Address" transfers the memory address corresponding to a peripheral device register across the S/370 interface into the converter. Next, a "Write Register" command is issued along with the appropriate data. The microprocessor in the converter takes the address and performs the necessary operations to load the data into the device register via the UNIBUS. Similarly, a "Read Register" command issued to the converter would fetch data from one of the device registers. By setting or resetting register bits using these commands, control operations occur. In addition, status conditions can be examined by reading status bits from a device register.

The incompatibilities between the S/370 channel and the UNIBUS prevent direct marriage of the interfaces. The S/370 channel requires a standard set-up procedure before data transfer can begin. On the other hand, the UNIBUS allows data transfer at any time. The S/370 channel program controls the destination of the data, while the UNIBUS device places an address on the bus where it wants its data to go. In order to overcome these differences, the adapter uses a high- speed buffer to transfer data. Both the S/370 channel and the UNIBUS are allocated one half of the access time of the buffer, guaranteeing a high data rate to both interfaces (Fig. 1).

The device attached to the UNIBUS views the buffer as a UNIBUS attached memory. The standard protocol for data transfer is used, and the UNIBUS control logic manages it. The UNIBUS makes it possible to transfer data between t...