Browse Prior Art Database

Electronic Data Path Separation

IP.com Disclosure Number: IPCOM000049183D
Original Publication Date: 1982-May-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Mannherz, JP: AUTHOR [+2]

Abstract

The system shown in the figure is based on the problem of connecting input/output units by means of a microprocessor to a system interface. The storage serves as a user storage and a data buffer. System monitoring, maintenance and diagnostic functions are performed. For a high data transmission rate, direct storage access must be possible both for the individual input/output adapters and the data path from and to the system interface. For this purpose, the processor controls the input/output adapters and the system interface, and provides and processes control information that is required in addition to the user data.

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Electronic Data Path Separation

The system shown in the figure is based on the problem of connecting input/output units by means of a microprocessor to a system interface. The storage serves as a user storage and a data buffer. System monitoring, maintenance and diagnostic functions are performed. For a high data transmission rate, direct storage access must be possible both for the individual input/output adapters and the data path from and to the system interface. For this purpose, the processor controls the input/output adapters and the system interface, and provides and processes control information that is required in addition to the user data. In order to avoid having to stop the processor when the input/output adapters directly access the storage for information and to reduce and prevent, by means of monitoring, maintenance and diagnostic functions, defects in the data path caused by the input/output adapters, the incorporated bus switch divides the whole system into two subsystems.

The first subsystem, shown in the bottom part of the figure, consists of a processor, a storage with controller, as well as an adapter for sensing, i.e., monitoring, maintaining and diagnosing, the system status. The second subsystem, in the upper part of the figure, also consists of a storage acting as a data buffer and adapters for the system interface, as well as input/output units.

This subdivision permits direct storage access without interfering with the operation of the processor. A delay can occur only if the processor accesses the data buffer, i.e.. if it considerably delays the number of its cycles. The availability of the subsystems for m...