Browse Prior Art Database

Tri-State, Off-Chip Driver Circuit

IP.com Disclosure Number: IPCOM000049289D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Erdelyi, CK: AUTHOR

Abstract

This off-chip driver circuit includes clock-responsive load devices and provides a tri-state push-pull data output signal. It achieves substantial power savings by utilizing a 3-volt supply to power the output stage.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 76% of the total text.

Page 1 of 2

Tri-State, Off-Chip Driver Circuit

This off-chip driver circuit includes clock-responsive load devices and provides a tri-state push-pull data output signal. It achieves substantial power savings by utilizing a 3-volt supply to power the output stage.

During unselected times when data clock DC is low, voltage node NA is precharged to 5 volts by device T1. Node NA, coupled to the gate of T15, keeps the gate of output pull-up device T16 at ground, isolating Data Out from the 3-volt supply. Since T6 is off, both nodes NB and NC are high. Node NB, coupled to the gate of T12, keeps the gate of output pull-down device T17 at ground, isolating Data Out from ground. Node NC is coupled to the input of inverter T7 and T8, and keeps node ND at ground. Device T11, having its gate coupled to NA, enables node NE to remain at a low level, reducing the current through T14.

When date clock DC rises, node NC is discharged, allowing node ND to rise and turn on load pair T9 and T10 to apply power to node NE, thus enabling the output drivers T11/T12 or T13/T14/T15, one of which will become active depending upon the state of the data input D.

If data input D is low when date clock DC rises, node NA remains high and node NB is discharged through T5, turning off T12 as well as load pair T13 and T14. With T12 off and T11 on, node NF rises, turning on T17 which clamps Date Out to ground.

If data input D is high when data clock DC goes high, node NA and NC are discharged and node NE is ena...