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Non-Inverting Summing Amplifier

IP.com Disclosure Number: IPCOM000049315D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

DeVito, WC: AUTHOR

Abstract

Summing amplifier 10 allows the use of a unipolar and non-critically regulated power supply Vb.

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Non-Inverting Summing Amplifier

Summing amplifier 10 allows the use of a unipolar and non-critically regulated power supply Vb.

The summing amplifier 10 is configured with identical current sources 11. Each current source 11 provides an output current I1, I2, . . . Ii which is correlated with its respective input voltage V1, V2, . . . Vi. The output currents are summed through resistance Ra and provide a voltage Va that is a linear superposition of the input voltages V1, V2, etc. Va is fed to non-inverting input (+) of summing amplifier 12, which has its output connected to its inverting input (-) and provides the output voltage Vo.

Each current source 11 has a differential amplifier stage 13, transistor stage 14 and voltage follower stage 15. Voltage follower 15 mitigates the load effects of resistors R3, R4. It can be shown that if R1=R2=R3=R4, the voltage drop produced by the particular output current passing through resistor Rs results in the following relationship: Vt = Vb - Vx, where Vx = V1, V2, . . . Vi, as the case might be. By feeding Vb into the non-inverting input (+) of amplifier 13, the value of the output current. e.g., I1, is independent of the bias supply Vb.

The output voltage Vo, it can be shown, is expressed as follows:

Vo = (1 + Rc/Rb) x Ra x Y, where Y is the integral of each of the current source input voltages V1, V2, etc., divided by the value of its resistor Rs.

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