Browse Prior Art Database

Integrated High Speed Data Bus Driver/ Receiver

IP.com Disclosure Number: IPCOM000049366D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Bonnet, Y: AUTHOR [+2]

Abstract

The figure shows a high speed driver/receiver which selectively operates as a driver or a receiver and which may be used to interface a logic input/output port with a bidirectional data bus. The driver/receiver is provided with fully dottable input/output terminals, which permits several circuits to be integrated in a single chip.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 93% of the total text.

Page 1 of 2

Integrated High Speed Data Bus Driver/ Receiver

The figure shows a high speed driver/receiver which selectively operates as a driver or a receiver and which may be used to interface a logic input/output port with a bidirectional data bus.

The driver/receiver is provided with fully dottable input/output terminals, which permits several circuits to be integrated in a single chip.

The mode of operation of the circuit is controlled by a logic signal applied to the Xmit/Rcv input by an open collector type stage (not shown). When the Xmit/Rcv input is up, diode D1 conducts, transistor T5 is on, a voltage reference is set at the base of transistor T4 and transistor T6 is off, thereby disabling the output of the receiver amplifier T7-T8. The logic signal that is present on the Data In/Out terminal is amplified by driver amplifier T3-T4 and transmitted over the bus via Bus In/Out terminal. Diode D2 protects the driver amplifier against power supply failures.

When the Xmit/Rcv input is down, diode D1 does not conduct, transistors T4 and T5 are off, thereby disabling driver amplifier T3-T4. The logical signal that is present on the bus is amplified by receiver amplifier T7-T8 and applied to Data In/Out terminal via transistor T6. Diode D3 protects the circuit against power supply failures.

When the Enable/Disable input is up, transistors T1 and T2 are on and off, respectively, thereby disabling driver amplifier T3-T4, and transistors T5 and T6 are on and off, respectively,...