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Bit Processing Low Pass Filter

IP.com Disclosure Number: IPCOM000049368D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Abbiate, JC: AUTHOR

Abstract

This circuit performs noise rejection through logic discrimination based on noise duration.

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Bit Processing Low Pass Filter

This circuit performs noise rejection through logic discrimination based on noise duration.

The signal provided at the circuit input is an analog squared signal or a logic signal. The signal is fed to a first AND gate Al both directly and through a first delay element DL1 delaying by "Tau"

The squared input signal is also inverted in N and then fed to a second AND gate A2, both directly and through a second delay element DL2. The A1 and A2 outputs are respectively used to set and reset a latch. This circuit thus measures positive and negative input squared pulse durations and compares each of the pulses to a duration reference (Tau). If the measured signal is shorter than the reference, it will not be taken into account. The function performed by the circuit is thus equivalent to a filtering function whereby any input pulse signal whose duration is shorter than Tau is ignored by the circuit. The time diagram shows that all the circled areas dealing with input pulses of durations smaller than Tau (i.e., noise pulses) are removed and do not appear in the output signal.

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