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Protection Mechanism

IP.com Disclosure Number: IPCOM000049424D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Hoffman, RL: AUTHOR [+3]

Abstract

A "privileged mode" flag and a set of rules for observing the meaning of that flag are implemented as part of the hardware for controlling a general purpose computer program processing unit. When in privileged mode, any instruction may reference any page of main storage by using a virtual or real address. When in nonprivileged mode, only data or instructions in those pages of main storage addressed by a virtual address may be referenced.

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Protection Mechanism

A "privileged mode" flag and a set of rules for observing the meaning of that flag are implemented as part of the hardware for controlling a general purpose computer program processing unit. When in privileged mode, any instruction may reference any page of main storage by using a virtual or real address. When in nonprivileged mode, only data or instructions in those pages of main storage addressed by a virtual address may be referenced.

Fig. 1 shows a Task Dispatching Element (TDE) with the privileged mode flag. Each task in the system has a TDE, and all TDEs are located in virtual- equals-real (V=R) storage. When a task is created, the privileged mode flag in its TDE is set to reflect whether or not that task can reference any page in main storage. The flag is set on if it can and off if it cannot.

When a task switch occurs, the task switch microcode routine executing in the microprocessor of the computer system reads the privileged mode flag from the new TDE and loads the flag into a CPU (Central Processing Unit) register, for example, Bit 1 or 3 of the G Register 20 (Fig. 2). The setting of this bit in G register 20 is then used to inhibit (Bit=0) or not inhibit (Bit=1) the V=R decode, as shown in Fig. 2. If a nonprivileged task attempts to reference a V=R address, the V=R decode will be inhibited. Without a V=R decode, a lookaside buffer translation will occur. No valid V=R address will be in the lookaside buffer, so a lookaside buffer m...