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Improved Condition Code and Branch Handling for Model 91-Like Implementation of the IBM System/370 Architecture

IP.com Disclosure Number: IPCOM000049486D
Original Publication Date: 1982-Jun-01
Included in the Prior Art Database: 2005-Feb-09
Document File: 2 page(s) / 13K

Publishing Venue

IBM

Related People

Agerwala, TKM: AUTHOR

Abstract

The concept set forth all was a high degree of concurrency between floating point (FLP) and non-floating point (NFLP) operations, and simplifies the management of the condition code in a 370 architecture.

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Improved Condition Code and Branch Handling for Model 91-Like Implementation of the IBM System/370 Architecture

The concept set forth all was a high degree of concurrency between floating point (FLP) and non-floating point (NFLP) operations, and simplifies the management of the condition code in a 370 architecture.

Consider a machine, M, which implements the 370 instruction set with a single central condition code. NFLP operations are executed in sequence. FLP operations can execute out of sequence and concurrently with NFLP operations. When an FLP operation is decoded in the I-unit, it is shipped to the FLP unit where a more complete decode is performed. In spite of the out-of-sequence execution, the processor must guarantee that a branch instruction sees the logically correct condition code. For example, the program sequence may be: FLP1

FLP2

NFLP1

BC

Assume that the first three instructions set the condition code. These instructions are decoded sequentially in the I-unit. The actual execution may be: NFLP1

FLP2

FLP1

BC

This is essentially the IBM System/360 Model 91 evironment. In the 91, the problem is solved in the following way: At any instant of time, precisely one of the several instructions in execution has the right to change the condition code. In the above example, when NFLP1 is decoded, the right to set the condition code is taken away from FLP2 (which is in the FLP unit) and granted to NFLP1. This requires global communication and synchronization which is costly, especially in today's technologies and packages. The proposed invention organizes the machine into three units:

1. An I-unit which has a very simple predecoder

that can recognize whether the instruction is FLP or a

Branch and whether the instruction sets the CC or not.
2. An NFLP unit which does a full decode of NFLP instructions

and executes them in sequence. It has a user invisibl...